FPGA Digital Design Engineer

Role Overview:

• Design and implement FPGA code for satellite digital payloads, focusing on DSP algorithms for software-defined radio or embedded systems interfacing with processors and peripherals.
• Participate in all phases of FPGA design flow including simulation, synthesis, place & route, timing closure, and hardware testing.

Required Skills & Qualifications:

• Bachelor’s Degree in Computer Engineering, Electrical Engineering, or equivalent with 5+ years of FPGA/RTL design experience.
• Proficiency in Verilog, SystemVerilog, or VHDL, and experience with Xilinx FPGAs (Zynq, UltraScale).
• Strong scripting skills (Python, Tcl, csh/bash) and experience with FPGA tools (Vivado, Quartus) and simulation tools (ModelSim).

Bonus Points:

• Experience with coherent digital demodulation (BPSK, QPSK, QAM) or memory-mapped interfaces (AXI, Wishbone, Avalon).
• Experience with high-speed transceivers (JESD204B, PCIe, SATA) or Xilinx Versal/RFSoC.

Salary and Compensation:

• Salary range of CAD 131,000 - 181,000 per year, with total compensation determined based on experience, skills, and education.
• Kepler welcomes applications from all qualified individuals and provides accommodation upon request during recruitment.