Job Description
Responsibilities:
- Develop verification and simulation strategies.
- Conduct design reviews.
- Create a digital test plan.
Required Skills:
- System Verilog with UVM (Universal Verification Methodology).
- Diagnose sophisticated test failures and filing results.
- Analyze code coverage to adjust agent sequence behavior.
Qualifications:
- Bachelors degree in Electrical Engineering or Computer Science.
- A minimum of 10 years of verification engineering experience.
- A Master's Degree is preferred.
About SEAKR Engineering
SEAKR Engineering is a leading-edge provider of advanced electronics for space applications. They are pushing the boundaries of technology on a mission to change the world for the better from space.