Intel

Principal Engineer - SoC Design Lead

The Principal Engineer - SoC Design Lead develops the logic design, register transfer level (RTL) coding, and simulation for an SoC design and integrates logic of IP blocks and subsystems into a full chip SoC or discrete component design. This role participates in the definition of architecture and microarchitecture features of the block being designed, performs quality checks, and applies strategies to optimize logic to meet goals, reviews verification plans, and follows secure development practices.