Mixed Signal Design Verification Engineer

Role and Impact:

• Play a pivotal role in ensuring the reliability and functionality of cutting-edge mixed signal components.
• Directly contribute to delivering robust designs that meet critical performance, power, and timing goals.
• Collaborate across diverse architectural and design groups to drive innovation in verification methodologies.

Key Responsibilities:

• Execute verification plans and build test benches to validate functionality, timing, and power requirements.
• Create analog behavioral models and system simulation models for presilicon debugging.
• Perform technical reviews and enhance verification infrastructure with AI-based tools.

Qualifications and Experience:

• Bachelor's in Electrical Engineering or Computer Engineering with 1+ years experience, or Master's with 0+ years.
• Proficiency in SystemVerilog, Verilog, and scripting languages like Python.
• Experience with OVM/UVM methodologies and AI-based tools is preferred.