PCB Layout Engineering Lead

Key Responsibilities:

• Own multilayer PCB layout from initial component placement through fabrication and assembly release.
• Translate schematics, mechanical constraints, and electrical requirements into constraint-driven board designs using industry-standard PCB layout tools.
• Define and implement board stackups, controlled-impedance structures, routing rules, reference planes, return paths, and length- and phase-matching constraints.

Minimum Qualifications:

• Bachelor’s degree in electrical engineering or equivalent practical experience.
• 10+ years of hands-on experience laying out complex, high-speed, multilayer printed circuit boards.
• Expertise with Cadence Allegro PCB Designer and Constraint Manager; strong knowledge of component placement and controlled-impedance routing.

Preferred Qualifications:

• Experience designing large, high-layer-count boards for compute, networking, server, or AI accelerator systems.
• Experience routing high-speed interfaces such as DDR4/DDR5, PCIe Gen4/Gen5, Ethernet, USB, and multi-gigabit SerDes.
• Experience developing Allegro SKILL, scripts, or automation that improves layout quality and release efficiency.