Responsible for the physical layout of integrated circuits from initial floorplanning to final tape-out, ensuring designs meet all performance, power, area, and reliability targets. Requires a strong understanding of semiconductor device physics, advanced process technologies, and a keen eye for detail. Will perform physical layout of complex analog / mixed-signal circuits, adhering to design specifications and foundry design rules.
Job listings
$169,915–$199,900
USD/year
The Physical Design Engineer will be responsible for block level synthesis, place & route and sign-off, end to end RTL 2 GDS at block level, and floorplanning, IP placement, timing constraints, UPF. Collaborate closely with the Microarchitecture/Logic Design team to optimize the design for best PPA goals and work with the Infrastructure/EDA/CAD team to optimize flows and methodology.