Groq

Seeking a Machine Learning Engineer to join our advanced model development team, focusing on pre-training, continued training, and post-training of models, with emphasis on draft model optimization for speculative decoding and quantization-aware training (QAT). The ideal candidate has deep experience with training methodologies, open-weight models, and performance-tuning for inference.

Lead the Hardware Systems Engineering team, with responsibility for product roadmap, vendor selection, manufacturing and design houses, ensuring quality and delivery of all technologies on schedule. Define and own the hardware systems engineering roadmap, strategy, and execution for our AI inference platform, with a focus on SoC integration and system-level performance.

The Physical Design Engineer will be responsible for block level synthesis, place & route and sign-off, end to end RTL 2 GDS at block level, and floorplanning, IP placement, timing constraints, UPF. Collaborate closely with the Microarchitecture/Logic Design team to optimize the design for best PPA goals and work with the Infrastructure/EDA/CAD team to optimize flows and methodology.

Collaborate with the Hardware Team to determine emulation platform requirements. Implement and optimize automated emulation flow to improve productivity and efficiency. Develop and execute test programs for hardware features of LPU chip. Debug RTL failures associated with LPU functionality. Stay updated on the latest trends and advancements in emulation and incorporate innovative techniques into the emulation process.

Provide technical sales support to help customers evaluate Groq's AI acceleration technology. Conduct technical demos and Proof of Concepts (PoCs) and articulate technical differentiators of Groq LPUs. Assist AEs in responding to RFPs and customer inquiries and work closely with Solutions Architects and Forward Deployed Engineers for deeper technical validation.

Verify hardware features of Language Process Unit (LPU). Collaborate within the Hardware Team to design and verify features on LPU chips in simulation, emulation and silicon. Develop and implement advanced verification environments and methodologies for complex ASIC designs. This is a dynamic fast-paced environment requiring hands-on involvement.

This position will focus on formal verification of Groq’s next generation hardware. Through this work term, the successful candidate will work alongside experienced engineers to help verify complex digital designs using formal verification techniques and tools. You will be involved in tasks ranging from setting up formal verification environments, running automated checks, debugging formal proofs, and supporting the integration of formal verification tools into the overall verification flow.

Accelerate machine learning workloads through architectures, breakthrough performance, and scaling. As we expand our product footprint and deliver on compute partnerships, we're hiring a Technical Program Manager to drive end-to-end execution across supply chain, manufacturing, internal operations, and partner delivery.