Develop custom IP for new features of the Kepler satellite digital payloads
Iterate on current DSP and interface designs to improve reliability
Work with IP core vendors and lead engineers to integrate new functionality and develop future satellite communications and network architecture
Kepler operates the first commercial optical data relay constellation, enabling real-time, continuous space communications while supporting advanced on-orbit compute and hosted payload capabilities. With 33 satellites launched to date, Kepler is a dedicated team of engineers building the next generation of spacecraft in an innovative and inclusive environment.
Work with cross-functional teams to deliver embedded processing solutions for communications and networking.
Own the FPGA firmware lifecycle from MATLAB/Simulink algorithms through architecture, integration, and test.
Establish HDL workflows and best practices for simulation, verification, and system testing.
Anduril Industries is a defense technology company transforming U.S. and allied military capabilities with advanced technology, including an AI-powered operating system called Lattice OS. The company brings a fast-paced, mission-driven culture focused on delivering cutting-edge autonomy, AI, and sensor fusion to the military.
Design and implement FPGA-based digital systems to meet functional, performance, and reliability requirements.
Translate system-level specifications into efficient digital architectures, including coding, synthesis, simulation, and timing closure.
Collaborate with cross-functional teams to integrate, verify, and debug FPGA designs for advanced communication platforms.
The company develops advanced digital hardware and communications technology solutions. It fosters a collaborative, innovation-driven environment with multidisciplinary engineering teams.
Define, design, verify, and document ASIC/FPGA developments, including architecture, system simulation, and detailed design approaches.
Evaluate process flows such as synthesis, place and route, timing, and power utilization, and create test and simulation plans.
Lead technical proposals, review vendor capabilities, and serve as a consultant to management and customers on complex engineering applications.
General Dynamics Mission Systems engineers a diverse portfolio of high technology solutions, products and services for defense and scientific missions. With a global team of 12,000+ professionals, they value trust, honesty, alignment and transparency, and offer a flexible work environment.
Responsible for definition, design, verification and documentation for ASIC and FPGA developments.
Develops test and simulation plans, verifies results, and analyzes performance using SystemVerilog, UVM, and formal methods.
Supports the generation of technical engineering products throughout the ASIC/FPGA development life cycle.
General Dynamics Mission Systems engineers a diverse portfolio of high technology solutions for defense and scientific missions. With a global team of 12,000+ professionals, they value trust, honesty, and transparency, offering a flexible work environment.
Serve as trusted technical advisor for signal processing applications using Altera FPGAs.
Partner with sales and engineering teams to drive strategic opportunities from concept to production.
Support DirectRF and next-gen signal processing initiatives across radar, EW, and communications.
Altera provides leadership programmable solutions including FPGAs, CPLDs, and development tools for applications from cloud to edge. The company focuses on pioneering innovation and collaboration to solve demanding real-time processing challenges.