Source Job

US

  • Responsible for definition, design, verification and documentation for ASIC and FPGA developments.
  • Develops test and simulation plans, verifies results, and analyzes performance using SystemVerilog, UVM, and formal methods.
  • Supports the generation of technical engineering products throughout the ASIC/FPGA development life cycle.

SystemVerilog UVM FPGA Python

7 jobs similar to Advanced ASIC FPGA Verification Engineer

Jobs ranked by similarity.

US

  • Define, design, verify, and document ASIC/FPGA developments, including architecture, system simulation, and detailed design approaches.
  • Evaluate process flows such as synthesis, place and route, timing, and power utilization, and create test and simulation plans.
  • Lead technical proposals, review vendor capabilities, and serve as a consultant to management and customers on complex engineering applications.

General Dynamics Mission Systems engineers a diverse portfolio of high technology solutions, products and services for defense and scientific missions. With a global team of 12,000+ professionals, they value trust, honesty, alignment and transparency, and offer a flexible work environment.

$160,000–$240,000/yr
North America

  • Develop and maintain UVM-based verification environments for complex ASIC and FPGA designs.
  • Create and execute coverage-driven verification plans, test cases, and SystemVerilog Assertions.
  • Collaborate with RTL engineers to debug issues, analyze coverage, and drive verification to closure.

Delos Data builds foundational technology for performance, scalability, and resiliency in large-scale AI data center clusters. The startup is backed by top-tier VCs, led by experienced founders, and operates with a culture of unity, trust, and accountability across the U.S. and Canada.

$166,000–$220,000/yr
US

  • Work with cross-functional teams to deliver embedded processing solutions for communications and networking.
  • Own the FPGA firmware lifecycle from MATLAB/Simulink algorithms through architecture, integration, and test.
  • Establish HDL workflows and best practices for simulation, verification, and system testing.

Anduril Industries is a defense technology company transforming U.S. and allied military capabilities with advanced technology, including an AI-powered operating system called Lattice OS. The company brings a fast-paced, mission-driven culture focused on delivering cutting-edge autonomy, AI, and sensor fusion to the military.

North America Unlimited PTO

  • Design and implement FPGA code for Kepler's satellite digital payloads, focusing on DSP algorithms for software-defined radios or embedded systems.
  • Participate in all phases of FPGA design flow, from simulation and synthesis through timing closure and hardware testing.
  • Collaborate with lead engineers on communications architecture and integrate IP cores for new satellite constellation features.

Kepler Communications operates the first commercial optical data relay constellation, providing real-time, on-orbit connectivity for critical missions. With 33 satellites launched and a Great Place to Work certification for seven years, the company fosters a culture of bold thinkers and passionate problem-solvers.

North America Spain

  • Work closely with CPU architects, RTL designers, and software engineers to develop verification strategies.
  • Build robust test environments and uncover corner cases in modern out-of-order processors.
  • Own meaningful portions of the verification effort from test plans to debugging failures.

Tenstorrent is a leader in AI technology, developing high-performance RISC-V CPUs and AI platforms. The company values collaboration, curiosity, and solving hard problems, and is growing its team with contributors of all seniorities.

$160,000–$240,000/yr
North America

  • Design and implement RTL for complex digital subsystems using Verilog/SystemVerilog
  • Collaborate with architecture, verification, and physical design teams to ensure design correctness and closure
  • Translate architectural specifications into clean, efficient, and scalable microarchitectures

We are a startup building foundational technology for AI data center clusters, backed by top-tier VC firms. We are a remote-first team of experienced builders based in the U.S. and Canada, with a culture of trust, integrity, and shared responsibility.

North America

  • Develop custom IP for new features of the Kepler satellite digital payloads
  • Iterate on current DSP and interface designs to improve reliability
  • Work with IP core vendors and lead engineers to integrate new functionality and develop future satellite communications and network architecture

Kepler operates the first commercial optical data relay constellation, enabling real-time, continuous space communications while supporting advanced on-orbit compute and hosted payload capabilities. With 33 satellites launched to date, Kepler is a dedicated team of engineers building the next generation of spacecraft in an innovative and inclusive environment.