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Senior/Staff DFT Engineer
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Responsibilities:
- Develop and execute verification plans for Processor units, ensuring all requirements and specifications are met.
- Design and implement constrained random testbenches for processor core.
- Collaborate with architecture, RTL design, and compiler teams to ensure thorough verification coverage.
Qualifications:
- A degree in electronics engineering, electrical engineering or computer science or other relevant discipline.
- A minimum of 5 years of experience in ASIC or FPGA verification, with a strong focus on processor verification especially using instruction set simulators.
- Proficiency in SystemVerilog and C/C++ or Python for designing and implementing testbenches, and test cases for processor verification.
Axelera AI
Axelera AI is creating the next-generation AI platform to support anyone who wants to help advance humanity and improve the world. They are a world-class team of 220+ employees (including 49+ PhDs) with offices in multiple European countries and headquartered in Eindhoven, Netherlands.