Guarantee RTL designs are matching specifications and requirements
Define, implement and execute verification plans to ensure the designs meet quality and performance goals
Build and maintain automated verification environments
Axelera AI is creating the next-generation AI platform. They have a world-class team of 220+ employees, including 49+ PhDs, and are headquartered at the High Tech Campus in Eindhoven, Netherlands with offices across Europe.
Contribute to the validation of advanced chip designs.
Help create and maintain UVM environments, write tests.
Ensure functional coverage for high-performance silicon products.
We are seeking talented individuals in the field of verification. FortifyIQ appears to be a growing company focused on high-performance silicon products.
Collaborate with cross-functional teams to clarify design specifications.
Architect and implement advanced micro-architectures adhering to performance metrics.
Conduct block and system-level RTL coding, ensuring optimal performance.
Axelera AI is creating the next-generation AI platform to support anyone who wants to help advancing humanity and improve the world around us. In just four years, they have raised a total of $120 million and have built a world-class team of 220+ employees, both remotely from 17 different countries and with offices in Europe.
Verify high-performance, out-of-order RISC-V CPU designs.
Influence verification strategy and collaborate with architects.
Ensure correctness, performance, and scalability of complex CPUs.
Tenstorrent is innovating in AI technology, aiming for top performance, usability, and cost-effectiveness. Their team is developing a high-performance RISC-V CPU and is passionate about creating the best AI platform, valuing collaboration and problem-solving.
Collaborate with RTL, verification, and physical design teams to integrate DFT solutions efficiently.
Support silicon bring-up and debug, helping to optimize test coverage and yield.
Axelera AI is creating the next-generation AI platform. They have a world-class team of 220+ employees, including 49+ PhDs, with offices in multiple European countries and are headquartered in Eindhoven, Netherlands.
Define HW architecture and evaluate design trade-offs for performance, area, and power.
Lead RTL development, integration, and verification throughout the design cycle.
Mentor and review junior engineers’ work, promoting best practices and technical excellence.
They are looking for a senior-level Hardware Design Engineer to take the lead on complex ASIC and FPGA development projects. They aim to deliver high-performance, reliable silicon solutions in a flexible hybrid environment.
Participate in design development tasks throughout the IP development flow.
Develop the logic design, RTL coding, and simulation for an IP.
Apply strategies to write RTL and optimize the logic to qualify the design.
Altera delivers cutting-edge FPGA, CPLD, and IP technologies, driving innovation in high-speed connectivity and AI acceleration. They empower engineers to design and deploy advanced systems with unmatched flexibility and performance, contributing to shaping the future through innovation.