Similar Jobs
See allStaff Engineer - Design Verification
Partner Company
India
SystemVerilog
Lead Network Architecture Test Engineer
Not Disclosed
US
Python
Bash
Linux
Principal ASIC Package Design Engineer
K2 Space
US
Front End Design Verification Engineer
Tenstorrent
North America
SystemVerilog
C/C++
Python
QA Engineer
Siftwell Analytics
United States
Python
SQL
Automated Testing
About the Role:
- Lead silicon bring-up and characterization for complex mixed-signal SoCs.
- Drive validation from first silicon to product readiness.
Key Responsibilities:
- Define and execute validation strategy and readiness criteria.
- Build test and validation lab infrastructure, including automation.
- Collaborate with cross-functional teams to debug and resolve silicon issues.
Qualifications:
- 5+ years of post-silicon validation or SoC bring-up experience.
- Hands-on experience with lab equipment and Python/scripting.
- Strong understanding of SoC architecture and mixed-signal circuits.
K2 Space
K2 Space builds the largest and highest-power satellites ever flown, backed by over $1 billion in funding and with over $1 billion in signed contracts. The company is scaling to produce 100 satellites per year, fostering a fast-paced, innovative culture.