Responsible for definition, design, verification and documentation for ASIC and FPGA developments.
Develops test and simulation plans, verifies results, and analyzes performance using SystemVerilog, UVM, and formal methods.
Supports the generation of technical engineering products throughout the ASIC/FPGA development life cycle.
General Dynamics Mission Systems engineers a diverse portfolio of high technology solutions for defense and scientific missions. With a global team of 12,000+ professionals, they value trust, honesty, and transparency, offering a flexible work environment.
Design and implement FPGA code for Kepler's satellite digital payloads, focusing on DSP algorithms for software-defined radios or embedded systems.
Participate in all phases of FPGA design flow, from simulation and synthesis through timing closure and hardware testing.
Collaborate with lead engineers on communications architecture and integrate IP cores for new satellite constellation features.
Kepler Communications operates the first commercial optical data relay constellation, providing real-time, on-orbit connectivity for critical missions. With 33 satellites launched and a Great Place to Work certification for seven years, the company fosters a culture of bold thinkers and passionate problem-solvers.
Develop custom IP for new features of the Kepler satellite digital payloads
Iterate on current DSP and interface designs to improve reliability
Work with IP core vendors and lead engineers to integrate new functionality and develop future satellite communications and network architecture
Kepler operates the first commercial optical data relay constellation, enabling real-time, continuous space communications while supporting advanced on-orbit compute and hosted payload capabilities. With 33 satellites launched to date, Kepler is a dedicated team of engineers building the next generation of spacecraft in an innovative and inclusive environment.
Design and implement FPGA-based digital systems to meet functional, performance, and reliability requirements.
Translate system-level specifications into efficient digital architectures, including coding, synthesis, simulation, and timing closure.
Collaborate with cross-functional teams to integrate, verify, and debug FPGA designs for advanced communication platforms.
The company develops advanced digital hardware and communications technology solutions. It fosters a collaborative, innovation-driven environment with multidisciplinary engineering teams.
Design and implement complex, configurable, low-latency RTL modules using SystemVerilog.
Develop digital logic for high-performance FPGA and ASIC applications, including signal processing and real-time control.
Collaborate with architects, verification engineers, and hardware specialists on quantum control platforms.
The company develops advanced control and measurement systems for quantum computing, enabling precise real-time control of complex quantum systems. It works in an international engineering environment focused on FPGA and ASIC-based platforms.