Remote Electrical engineering Jobs · SystemVerilog

Job listings

North America Unlimited PTO

  • Design and implement FPGA code for Kepler's satellite digital payloads, focusing on DSP algorithms for software-defined radios or embedded systems.
  • Participate in all phases of FPGA design flow, from simulation and synthesis through timing closure and hardware testing.
  • Collaborate with lead engineers on communications architecture and integrate IP cores for new satellite constellation features.

Kepler Communications operates the first commercial optical data relay constellation, providing real-time, on-orbit connectivity for critical missions. With 33 satellites launched and a Great Place to Work certification for seven years, the company fosters a culture of bold thinkers and passionate problem-solvers.

  • Responsible for definition, design, verification and documentation for ASIC and FPGA developments.
  • Develops test and simulation plans, verifies results, and analyzes performance using SystemVerilog, UVM, and formal methods.
  • Supports the generation of technical engineering products throughout the ASIC/FPGA development life cycle.

General Dynamics Mission Systems engineers a diverse portfolio of high technology solutions for defense and scientific missions. With a global team of 12,000+ professionals, they value trust, honesty, and transparency, offering a flexible work environment.

$160,000–$240,000/yr

  • Design and implement RTL for complex digital subsystems using Verilog/SystemVerilog
  • Collaborate with architecture, verification, and physical design teams to ensure design correctness and closure
  • Translate architectural specifications into clean, efficient, and scalable microarchitectures

We are a startup building foundational technology for AI data center clusters, backed by top-tier VC firms. We are a remote-first team of experienced builders based in the U.S. and Canada, with a culture of trust, integrity, and shared responsibility.

$160,000–$240,000/yr

  • Develop and maintain UVM-based verification environments for complex ASIC and FPGA designs.
  • Create and execute coverage-driven verification plans, test cases, and SystemVerilog Assertions.
  • Collaborate with RTL engineers to debug issues, analyze coverage, and drive verification to closure.

Delos Data builds foundational technology for performance, scalability, and resiliency in large-scale AI data center clusters. The startup is backed by top-tier VCs, led by experienced founders, and operates with a culture of unity, trust, and accountability across the U.S. and Canada.