Design and implement RTL for complex digital subsystems using Verilog/SystemVerilog
Collaborate with architecture, verification, and physical design teams to ensure design correctness and closure
Translate architectural specifications into clean, efficient, and scalable microarchitectures
We are a startup building foundational technology for AI data center clusters, backed by top-tier VC firms. We are a remote-first team of experienced builders based in the U.S. and Canada, with a culture of trust, integrity, and shared responsibility.
Work with hardware architects, designers, and verification engineers to build tools that accelerate their workflows.
Evolve the Bluespec compiler and libraries to improve compile speed, reproducibility, and error detection.
Build flows connecting design and verification, including assertions and Rust reference model checks.
MatX designs full-stack AI hardware and software to make AI models run as efficiently as possible. The company fosters a culture of engineering excellence, where teams work closely on compilers, silicon, and ML systems.
Design and implement complex, configurable, low-latency RTL modules using SystemVerilog.
Develop digital logic for high-performance FPGA and ASIC applications, including signal processing and real-time control.
Collaborate with architects, verification engineers, and hardware specialists on quantum control platforms.
The company develops advanced control and measurement systems for quantum computing, enabling precise real-time control of complex quantum systems. It works in an international engineering environment focused on FPGA and ASIC-based platforms.
Design realistic electrical engineering tasks based on electronics development, circuit analysis, and electrical systems design.
Create and validate electrical schematics, PCB layouts, and technical specifications for AI evaluation.
Review AI-generated designs for technical accuracy and establish reference solutions.
We create high-quality training and evaluation data for frontier AI models. We are a flexible, remote-first organization assembling a team of expert contractors to advance AI systems.
Building agents, environments, and post-training systems for real semiconductor design and verification workflows.
Designing rewards and evaluations that combine functional correctness with tool efficiency, robustness, and performance/power/area constraints.
Owning interactive environments where agents use EDA tools to modify designs, debug failures, and plan multi-step work.
Prime Intellect builds the open superintelligence stack, unifying compute, environments, evaluations, and deployment for frontier-scale AI post-training. The company has raised $150M in funding from top investors like Founders Fund and NVIDIA, fostering a culture of building at the intersection of research, infrastructure, and go-to-market.
Own RTL to GDS physical implementation flows including synthesis, floor-planning, place and route, clock tree synthesis, timing/power closure, EM/IR, and PD sign-off.
Own physical design and implementation of high-performance designs from block level to system level components.
Collaborate with micro-architects on performance, power, and area trade-offs and develop methodologies for physical implementation.
Baya Systems is a fast-moving Series B startup accelerating intelligent computing in the emerging chiplet era with software-driven fabric solutions and semiconductor IP. Built by serial entrepreneurs, it seeks energetic, dedicated individuals passionate about enabling innovation in the semiconductor industry.
Design realistic tasks for AI evaluation covering circuit analysis, electronics, and PCB design.
Create and validate technical reference solutions to assess AI-generated engineering outputs.
Collaborate with experts to develop objective criteria for accuracy and completeness.
Jobgether is a job platform using AI-powered matching to connect candidates with remote and contract roles. It focuses on fast, objective, and fair recruitment processes for partner companies.
Build and debug emulation models from RTL designs using synthesis, partitioning, and routing tools.
Develop automation tools and workflows to streamline emulation setup and increase verification efficiency.
Collaborate with design, validation, and software teams to resolve complex technical issues and support SoC bring-up.
This company focuses on SoC and IP development using hardware emulation and verification for next-generation silicon. The team is collaborative and high-impact, working with advanced emulation platforms and multidisciplinary engineering teams.
Design and implement FPGA code for Kepler's satellite digital payloads, focusing on DSP algorithms for software-defined radios or embedded systems.
Participate in all phases of FPGA design flow, from simulation and synthesis through timing closure and hardware testing.
Collaborate with lead engineers on communications architecture and integrate IP cores for new satellite constellation features.
Kepler Communications operates the first commercial optical data relay constellation, providing real-time, on-orbit connectivity for critical missions. With 33 satellites launched and a Great Place to Work certification for seven years, the company fosters a culture of bold thinkers and passionate problem-solvers.
Define, design, verify, and document ASIC/FPGA developments, including architecture, system simulation, and detailed design approaches.
Evaluate process flows such as synthesis, place and route, timing, and power utilization, and create test and simulation plans.
Lead technical proposals, review vendor capabilities, and serve as a consultant to management and customers on complex engineering applications.
General Dynamics Mission Systems engineers a diverse portfolio of high technology solutions, products and services for defense and scientific missions. With a global team of 12,000+ professionals, they value trust, honesty, alignment and transparency, and offer a flexible work environment.
Architect and implement bare-metal C firmware for RISC-V management cores in AI/HPC networking silicon.
Establish secure firmware loading, engine initialization, and multi-die support with robust validation.
Provide technical leadership, define hardware/software interfaces, and integrate AI-assisted engineering tools.
The company develops next-generation networking silicon for AI and high-performance computing infrastructure. It fosters a collaborative, technically ambitious remote engineering culture with a focus on innovation.
Develop custom IP for new features of the Kepler satellite digital payloads
Iterate on current DSP and interface designs to improve reliability
Work with IP core vendors and lead engineers to integrate new functionality and develop future satellite communications and network architecture
Kepler operates the first commercial optical data relay constellation, enabling real-time, continuous space communications while supporting advanced on-orbit compute and hosted payload capabilities. With 33 satellites launched to date, Kepler is a dedicated team of engineers building the next generation of spacecraft in an innovative and inclusive environment.
Design and implement FPGA-based digital systems to meet functional, performance, and reliability requirements.
Translate system-level specifications into efficient digital architectures, including coding, synthesis, simulation, and timing closure.
Collaborate with cross-functional teams to integrate, verify, and debug FPGA designs for advanced communication platforms.
The company develops advanced digital hardware and communications technology solutions. It fosters a collaborative, innovation-driven environment with multidisciplinary engineering teams.
Drive comprehensive SoC-level power and thermal management architecture for AI inference and training workloads.
Review and guide RTL implementation, collaborate with Physical Design teams, and refine floorplanning and multi-voltage domain structures.
Develop advanced Physical Design recipes and custom EDA workflows to achieve best-in-class PPA targets.
EnCharge AI develops next-generation AI platforms using novel in-memory-computing architecture. The company is an experienced team of AI researchers, silicon and systems engineers, and architects backed by leading investors.
Design realistic mechanical engineering tasks based on product development, manufacturing, and industrial workflows.
Create and validate technical drawings, 3D CAD models, assemblies, and engineering calculations.
Review AI-generated engineering outputs for accuracy, feasibility, and compliance with requirements.
Anyone AI creates high-quality training and evaluation data for frontier AI models. It operates as a remote-first contractor-based team, emphasizing technical rigor and expert collaboration.
Complete specialized legal tasks and structured workflows based on provided prompts.
Analyze complex legal subject matter to produce accurate, high-quality responses.
Manage an ongoing, flexible weekly commitment using software-based time tracking.
Terac is building the world's largest pool of vetted human experts for AI. Researchers, AI labs, and product teams use Terac to recruit, screen, and pay study participants across industries, languages, and skill sets.